Bandwidth Steering for HPC Using Silicon Nanophotonics

Authors: George Michelogiannakis (Lawrence Berkeley National Laboratory, Stanford University), Yiwen Shen (Columbia University), Min Yee Teh (Columbia University), Xiang Meng (Columbia University), Benjamin Aivazi (Columbia University), Taylor Groves (Lawrence Berkeley National Laboratory), John Shalf (Lawrence Berkeley National Laboratory), Madeleine Glick (Columbia University), Manya Ghobadi (Massachusetts Institute of Technology (MIT)), Larry Dennison (Nvidia Corporation), Keren Bergman (Columbia University)

Abstract: As bytes-per-FLOP ratios continue to decline, communication is becoming a bottleneck for performance scaling. This paper describes bandwidth steering in HPC using emerging reconfigurable silicon photonic switches. We demonstrate that placing photonics in the lower layers of a hierarchical topology efficiently changes the connectivity and consequently allows operators to recover from system fragmentation that is otherwise hard to mitigate using common task placement strategies. Bandwidth steering enables efficient utilization of the higher layers of the topology and reduces cost with no performance penalties. In our simulations with a few thousand network endpoints, bandwidth steering reduces static power consumption per unit throughput by 36% and dynamic power consumption by 14% compared to a reference fat tree topology. Such improvements magnify as we taper the bandwidth of the upper network layer. In our hardware testbed, bandwidth steering improves total application execution time by 69%, unaffected by bandwidth tapering.


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