BEGIN:VCALENDAR
VERSION:2.0
PRODID:Linklings LLC
BEGIN:VTIMEZONE
TZID:America/Denver
X-LIC-LOCATION:America/Denver
BEGIN:DAYLIGHT
TZOFFSETFROM:-0700
TZOFFSETTO:-0600
TZNAME:MDT
DTSTART:19700308T020000
RRULE:FREQ=YEARLY;BYMONTH=3;BYDAY=2SU
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0600
TZOFFSETTO:-0700
TZNAME:MST
DTSTART:19701101T020000
RRULE:FREQ=YEARLY;BYMONTH=11;BYDAY=1SU
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20200129T163204Z
LOCATION:501-502
DTSTART;TZID=America/Denver:20191119T143000
DTEND;TZID=America/Denver:20191119T150000
UID:submissions.supercomputing.org_SC19_sess369_exforum150@linklings.com
SUMMARY:A New Block Floating Point Arithmetic Unit for AI/ML Workloads
DESCRIPTION:Exhibitor Forum\n\nA New Block Floating Point Arithmetic Unit
for AI/ML Workloads\n\nJacobson\n\nBlock Floating Point (BFP) is a hybrid
of floating-point and fixed-point arithmetic where a block of data is assi
gned a common exponent. We describe a new arithmetic unit that natively pe
rforms Block Floating Point for common matrix arithmetic operations and cr
eates floating-point results. The BFP arithmetic unit supports several dat
a formats with varying precision and range. BFP offers substantial power a
nd area savings over traditional floating-point arithmetic units by tradin
g off some precision. This new arithmetic unit has been implemented in the
new family of 7nm FPGAs from Achronix. We cover the architecture and supp
orted operations of the BFP unit. In this presentation, artificial intelli
gence and machine learning workloads are benchmarked to demonstrate the pe
rformance improvement and power savings of BFP as compared to half-precisi
on (FP16) operations.\n\nTag: Tech Program Reg Pass, Exhibits Reg Pass, Ex
hibits - Exhibit Hall Only Reg Pass, AI, Hardware\n\nRegistration Category
: Tech Program Reg Pass, Exhibits Reg Pass, Exhibits - Exhibit Hall Only R
eg Pass, AI, Hardware
URL:https://sc19.supercomputing.org/presentation/?id=exforum150&sess=sess3
69
END:VEVENT
END:VCALENDAR