Research Posters
Poster 131: Efficiency of Algorithmic Structures
Event Type
Research Posters
Registration Categories
TimeThursday, 21 November 20198:30am - 5pm
LocationE Concourse
DescriptionThe implementation of high-performance parallel software is challenging and raises issues not seen in serial programs before. It requires a strategy of parallel execution which preserves correctness but maximizes scalability. Efficiently deriving well-scaling solutions remains an unsolved problem especially with the quickly-evolving hardware landscape of high-performance computing (HPC).

This work proposes a framework for classifying the efficiency of parallel programs. It bases on a strict separation between the algorithmic structure of a program and its executed functions. By decomposing parallel programs into a hierarchical structure of parallel patterns, a high-level abstraction is provided which leads to equivalence classes over parallel programs. Each equivalence class possesses efficiency properties, mainly communication and synchronization, dataflow and architecture efficiency. This classification allows for wide application areas and a workflow for structural optimization of parallel algorithms is proposed.
Back To Top Button