Poster 119: Toward Lattice QCD on Fugaku: SVE Compiler Studies and Micro-Benchmarks in the RIKEN Fugaku Processor Simulator

Authors: Nils Meyer (University of Regensburg, Bavaria), Tilo Wettig (University of Regensburg, Bavaria), Yuetsu Kodama (RIKEN Center for Computational Science (R-CCS)), Mitsuhisa Sato (RIKEN Center for Computational Science (R-CCS))

Abstract: The Fugaku supercomputer, successor to the Japanese flagship K-Computer, will start operation in 2021. Fugaku incorporates the Fujitsu A64FX processor, which is the first hardware implementation supporting the Arm SVE instruction set, in this case a 512-bit version. Real hardware is not accessible today, but RIKEN has designed a simulator of the A64FX. We present micro-benchmarks relevant for Lattice QCD obtained in the RIKEN Fugaku processor simulator and compare three different SVE compilers.

Best Poster Finalist (BP): no

Poster: PDF
Poster summary: PDF


Back to Poster Archive Listing