SC19 Proceedings

The International Conference for High Performance Computing, Networking, Storage, and Analysis

Poster 120: ILP-Based Scheduling for Linear-Tape Model Trapped-Ion Quantum Computers

Authors: Xin-Chuan Wu (University of Chicago), Yongshan Ding (University of Chicago), Yunong Shi (University of Chicago), Yuri Alexeev (Argonne National Laboratory), Hal Finkel (Argonne National Laboratory), Kibaek Kim (Argonne National Laboratory), Frederic T. Chong (University of Chicago)

Abstract: Quantum computing (QC) is emerging as a potential post-Moore high-performance computing (HPC) technology. Trapped-ion quantum bits (qubits) are among the most leading technologies to reach scalable quantum computers that would solve certain problems beyond the capabilities of even the largest classical supercomputers. In trapped-ion QC, qubits can physically move on the ion trap. The state-of-the-art architecture, linear-tape model, only requires a few laser beams to interact with the entire qubits by physically moving the interacting ions to the execution zone. Since the laser beams are limited resources, the ion chain movement and quantum gate scheduling are critical for the circuit latency. To harness the emerging architecture, we present our mathematical model for scheduling the qubit movements and quantum gates in order to minimize the circuit latency. In our experiment, our scheduling reduces 29.47% circuit latency on average. The results suggest classical HPC would further improve the quantum circuit optimization.

Best Poster Finalist (BP): no

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