Presentation
HPC Interconnects at the End of Moore’s Law
SessionPHOTONICS: Photonics-Optics Technology Oriented Networking, Information, and Computing Systems
Presenter
Event Type
Workshop
W
Architectures
Datacenter
Emerging Technologies
Hardware
HPC
I/O
Networks
Photonics
Silicon Fabrication
TimeMonday, 18 November 201910:30am - 10:50am
Location710
DescriptionThe tapering of lithography advances that have been associated with Moore’s Law will substantially change requirements for future interconnect architectures for large-scale datacenters and HPC systems. Architectural specialization is creating new datacenter requirements such as emerging accelerator technologies for machine learning workloads and rack disaggregation strategies will push the limits of current interconnect technologies. Whereas photonic technologies are often sold on the basis of higher bandwidth and energy efficiency (e.g. lower picojoules per bit), these emerging workloads and technology trends will shift the emphasis to other metrics such as bandwidth density (as opposed to bandwidth alone) and reduced latency, and performance consistency. Such metrics cannot be accomplished with device improvements alone, but require a systems view of photonics in datacenters.
